Layout Engineer - Texas Instruments - Beijing

Job description
Language skill needs to be native Mandarin for an applicant who has interest in applying for this position.

Basic understanding of Silicon process technology. Basic understanding of both analog and digital circuit topology. Understand matching technique and parasitic components come from various layout structures. Have DRC/LVS experience, parasitic extraction and assembly rule checks.

Basic qualifications:
Experience of whole chip layout work desired, including floor plan, ESD structure, top level routing, digital core place and routing. BCD layout experience is very helpful.

Preferred Skills:
Strong communication skill and cooperative spirit to work with design team. English communication skill is a plus.

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